A Reduced Instruction Set Computer (RISC) refers to a processor whose design is based on the rapid execution of a sequence of simple instructions rather than on the provision of a large variety of complex instructions, as in a Complex Instruction Set Computer or (CISC).
Features which are generally found in RISC designs are uniform instruction encoding (e.g. the opcode is always in the same bit positions in each instruction which is always one word long), which allows faster decoding; a homogenous register set, allowing any register to be used in any context and simplifying compiler design; and simple addressing modes with more complex modes replaced by sequences of simple arithmetic instructions.
Examples of (more or less) RISC processors are the Berkeley RISC, PA-RISC, Clipper, Intel i960, AMD Am29000, MIPS R2000 and DEC Alpha. IBM's first RISC computer was the RT PC (IBM 801), followed by the RISC System/6000 and Scalable POWERparallel lines.
Despite Apple Computer's claims for their PowerPC-based Power Macintoshes, the first RISC processor in a personal computer was the Advanced RISC Machine (ARM) used in the Acorn Archimedes. Apple later licensed ARM's processor designs for its iOS devices before developing its own processors.[1]
References[]
- ↑ Reduced Instruction Set Computer at the Free On-Line Dictionary Of Computing. 1997-06-03.
External links[]
- Reduced instruction set computer at Wikipedia
